10:40:03.161 -> ESP-ROM:esp32c5-eco3-20250704
10:40:03.161 -> Build:Jul 4 2025
10:40:03.161 -> rst:0x1 (POWERON),boot:0x18 (SPI_FAST_FLASH_BOOT)
10:40:03.161 -> SPI mode:DIO, clock div:1
10:40:03.161 -> load:0x408556b0,len:0x1784
10:40:03.161 -> load:0x4084bba0,len:0xd78
10:40:03.161 -> load:0x4084e5a0,len:0x30cc
10:40:03.161 -> entry 0x4084bbaa
10:40:03.195 -> I (23) boot: ESP-IDF v5.5-dev-3506-g0973d2b4b6e-dirt 2nd stage bootloader
10:40:03.195 -> I (24) boot: compile time May 6 2025 21:00:47
10:40:03.195 -> I (25) boot: chip revision: v1.2
10:40:03.195 -> I (26) boot: efuse block revision: v0.3
10:40:03.195 -> I (29) boot.esp32c5: SPI Speed : 80MHz
10:40:03.195 -> I (33) boot.esp32c5: SPI Mode : DIO
10:40:03.195 -> I (37) boot.esp32c5: SPI Flash Size : 2MB
10:40:03.195 -> I (41) boot: Enabling RNG early entropy source...
10:40:03.228 -> I (45) boot: Partition Table:
10:40:03.228 -> I (48) boot: ## Label Usage Type ST Offset Length
10:40:03.228 -> I (54) boot: 0 nvs WiFi data 01 02 00009000 00006000
10:40:03.228 -> I (60) boot: 1 phy_init RF data 01 01 0000f000 00001000
10:40:03.228 -> I (67) boot: 2 factory factory app 00 00 00010000 00100000
10:40:03.228 -> I (74) boot: End of partition table
10:40:03.228 -> I (77) esp_image: segment 0: paddr=00010020 vaddr=42020020 size=08a3ch ( 35388) map
10:40:03.265 -> I (91) esp_image: segment 1: paddr=00018a64 vaddr=40800000 size=075b4h ( 30132) load
10:40:03.265 -> I (98) esp_image: segment 2: paddr=00020020 vaddr=42000020 size=16fd4h ( 94164) map
10:40:03.265 -> I (115) esp_image: segment 3: paddr=00036ffc vaddr=408075b4 size=0372ch ( 14124) load
10:40:03.265 -> I (119) esp_image: segment 4: paddr=0003a730 vaddr=4080ad00 size=016c4h ( 5828) load
10:40:03.299 -> I (123) boot: Loaded app from partition at offset 0x10000
10:40:03.299 -> I (124) boot: Disabling RNG early entropy source...
10:40:03.299 -> I (141) cpu_start: Unicore app
10:40:03.299 -> W (149) clk: esp_perip_clk_init() has not been implemented yet
10:40:03.299 -> I (155) cpu_start: Pro cpu start user code
10:40:03.299 -> I (155) cpu_start: cpu freq: 240000000 Hz
10:40:03.332 -> I (155) app_init: Application information:
10:40:03.332 -> I (155) app_init: Project name: blink
10:40:03.332 -> I (158) app_init: App version: qa-test-full-v5.5-20250430-36-g
10:40:03.332 -> I (164) app_init: Compile time: May 6 2025 21:00:44
10:40:03.332 -> I (169) app_init: ELF file SHA256: d80061c73...
10:40:03.332 -> I (174) app_init: ESP-IDF: v5.5-dev-3506-g0973d2b4b6e-dirt
10:40:03.332 -> I (180) efuse_init: Min chip rev: v1.0
10:40:03.365 -> I (184) efuse_init: Max chip rev: v1.99
10:40:03.365 -> I (188) efuse_init: Chip rev: v1.2
10:40:03.365 -> I (191) heap_init: Initializing. RAM available for dynamic allocation:
10:40:03.365 -> I (198) heap_init: At 4080D2A0 len 0004F300 (316 KiB): RAM
10:40:03.365 -> I (203) heap_init: At 4085C5A0 len 00002F58 (11 KiB): RAM
10:40:03.365 -> I (208) heap_init: At 50000000 len 00003FE8 (15 KiB): RTCRAM
10:40:03.365 -> I (214) spi_flash: detected chip: generic
10:40:03.399 -> I (217) spi_flash: flash io: dio
10:40:03.399 -> W (220) spi_flash: Detected size(8192k) larger than the size in the binary image header(2048k). Using the size in the binary image header.
10:40:03.399 -> I (232) sleep_gpio: Configure to isolate all GPIO pins in sleep state
10:40:03.399 -> I (239) sleep_gpio: Enable automatic switching of GPIO sleep configuration
10:40:03.399 -> I (245) main_task: Started on CPU0
10:40:03.399 -> I (245) main_task: Calling app_main()
10:40:03.443 -> I (245) example: Example configured to blink addressable LED!